SOURCESEL=NONE, EDSEL=OFF
Channel Control Register
| SIGSEL | Signal Select |
| SOURCESEL | Source Select 0 (NONE): No source selected 1 (PRSL): Peripheral Reflex System 2 (PRSH): Peripheral Reflex System 11 (RTCC): Real-Time Counter and Calendar 12 (GPIOL): General purpose Input/Output 13 (GPIOH): General purpose Input/Output 14 (LETIMER0): Low Energy Timer 0 15 (PCNT0): Pulse Counter 0 16 (PRORTC): Protocol Real-Time Counter 18 (CMU): Clock Management Unit 26 (CRYOTIMER): CRYOTIMER 48 (USART0): Universal Synchronous/Asynchronous Receiver/Transmitter 0 49 (USART1): Universal Synchronous/Asynchronous Receiver/Transmitter 1 60 (TIMER0): Timer 0 61 (TIMER1): Timer 1 62 (WTIMER0): Wide Timer 0 67 (CM4): undefined |
| EDSEL | Edge Detect Select 0 (OFF): Signal is left as it is 1 (POSEDGE): A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 2 (NEGEDGE): A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 3 (BOTHEDGES): A one HFCLK clock cycle pulse is generated for every edge of the incoming signal |
| STRETCH | Stretch Channel Output |
| INV | Invert Channel |
| ORPREV | Or Previous |
| ANDNEXT | And Next |
| ASYNC | Asynchronous Reflex |